Commit 21b1010e authored by Arthur Hugonnot's avatar Arthur Hugonnot Committed by Aleksandar Radojicic
Browse files

TC-X/TC-Y: update links to Etienne's slides

    * source/compiler_stages/tc_x/tc_x.rst,
    * source/compiler_stages/tc_y/tc_y.rst: Here
parent 642df7bd
Pipeline #28394 passed with stage
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......@@ -5,7 +5,7 @@ TC-X, IA-32 Back End
TC-X is an additional assignment.
This section has been updated for EPITA-2023 on 2021-05-07.
This section has been updated for EPITA-2023 on 2021-06-06.
At the end of this stage, the compiler produces IA-32 code
(possibly with infinite registers). Basically, this stage is :ref:`TC-7`
......@@ -18,7 +18,7 @@ x86, i386 and sometimes x86-32 or even x32, to distinguish it from the
original 16-bit ("x86-16") or the 64-bit (x86-64 or x64) variants of
the x86 family.
Relevant lecture notes include :lectures:`08-instruction-selection.pdf`.
Relevant lecture notes include :lectures:`47-instruction-selection.pdf`.
.. **TC-X Goals**: What this stage teaches
..
......
......@@ -5,7 +5,7 @@ TC-Y, ARM Back End
TC-Y is an additional assignment.
This section has been updated for EPITA-2023 on 2021-07-05.
This section has been updated for EPITA-2023 on 2021-06-06.
At the end of this stage, the compiler produces ARM code
(possibly with infinite registers). Basically, this stage is :ref:`TC-7`
......@@ -14,7 +14,7 @@ with the ARM assembly language instead of MIPS.
The ARM architecture is a family of RISC instruction set
architectures for computer processors.
Relevant lecture notes include :lectures:`08-instruction-selection.pdf`.
Relevant lecture notes include :lectures:`47-instruction-selection.pdf`.
.. **TC-Y Goals**: What this stage teaches
..
......
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