cpu.hxx 5.01 KB
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//
// This file is part of Nolimips, a MIPS simulator with unlimited registers
// Copyright (C) 2006 Benoit Perrot <benoit@lrde.epita.fr>
//
// Nolimips is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; either version 2 of the License, or
// (at your option) any later version.
//
// Nolimips is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
//
#ifndef VM_CPU_HXX
# define VM_CPU_HXX

# include "vm/cpu.hh"

# include "common.hh"

# include "inst/register.hh"

# include "vm/mmu.hh"

namespace vm
{

  //
  inline void
  Cpu::set_register(kind_type k, register_type r)
  {
    if (k != Cpu::zero)
      GPR_[k] = r;
  }
  inline register_type
  Cpu::get_register(kind_type k) const
  {
    return GPR_[k];
  }

  inline void
  Cpu::set_unlimited(int i, register_type r)
  {
    unlimited_.put(i, r);
  }
  inline bool
  Cpu::has_unlimited(int i) const
  {
    return unlimited_.has(i);
  }
  inline register_type
  Cpu::get_unlimited(int i) const
  {
    if (!has_unlimited(i))
      {
	std::cerr
	  << "Warning: unlimited register `$x" << i
	  << "' used before initialized" << std::endl;
	exit(exit_runtime);
      }
    return unlimited_.get(i);
  }

  inline void
  Cpu::set_register(const inst::Register& reg, register_type r)
  {
    if (reg.get_kind() == inst::Register::unlimited)
      unlimited_.put(reg.get_index(), r);
    else
      {
	precondition(reg.get_kind() == inst::Register::general &&
		     Cpu::zero <= reg.get_index() &&
		     reg.get_index() <= Cpu::ra);
	set_register((kind_type) reg.get_index(), r);
      }
  }
  inline register_type
  Cpu::get_register(const inst::Register& reg) const
  {
    if (reg.get_kind() == inst::Register::unlimited)
      return get_unlimited(reg.get_index());

    precondition(reg.get_kind() == inst::Register::general &&
		 Cpu::zero <= reg.get_index() && reg.get_index() <= Cpu::ra);
    return get_register((kind_type) reg.get_index());
  }

  //
  inline void
  Cpu::set_hi(register_type r)
  {
    hi_ = r;
  }
  inline register_type
  Cpu::get_hi() const
  {
    return hi_;
  }

  inline void
  Cpu::set_lo(register_type r)
  {
    lo_ = r;
  }
  inline register_type
  Cpu::get_lo() const
  {
    return lo_;
  }

  inline void
  Cpu::set_pc(register_type r)
  {
    pc_ = r;
  }
  inline register_type
  Cpu::get_pc() const
  {
    return pc_;
  }

  inline unsigned
  Cpu::get_instruction_counter(inst::Inst::format_type format) const
  {
    return counters_[format];
  }

  inline Mmu &
  Cpu::get_mmu()
  {
    return mmu_;
  }
  inline Cp0 &
  Cpu::get_cp0()
  {
    return cp0_;
  }

  //
  inline void
  Cpu::call()
  {
    if (check_callee_save_p_)
      for (int i = Cpu::s0; i <= Cpu::s7; ++i)
	set_unlimited(-i, get_register((Cpu::kind_type) i));
    call_stack_.push_back(get_pc ());

    unlimited_.begin_scope();
  }
  inline void
  Cpu::ret()
  {
    unlimited_.end_scope();

    if (check_callee_save_p_)
      for (int i = Cpu::s0; i <= Cpu::s7; ++i)
	if (get_unlimited(-i) != get_register((Cpu::kind_type) i))
	  {
	    std::cerr
	      << "Warning: callee save register `$s" << i - Cpu::s0
	      << "' was not preserved across last call to 0x"
	      << std::hex << *call_stack_.rbegin() << std::dec << std::endl;
	    set_register((Cpu::kind_type) i, get_unlimited(-i));
	    exit_set(exit_runtime);
	  }
    call_stack_.pop_back();
  }

  inline const std::vector<register_type> &
  Cpu::get_call_stack() const
  {
    return call_stack_;
  }

  inline void
  Cpu::set_check_callee_save(bool check_callee_save_p)
  {
    check_callee_save_p_ = check_callee_save_p;
  }

  inline void
  Cpu::set_trace(bool trace_p) { trace_p_ = trace_p; }

  //
  inline void
  Cpu::step()
  {
    if (trace_p_)
      std::cout << "[I :: " << *pipeline_[i_stage] << "] " << std::endl
		<< "[D :: " << *pipeline_[d_stage] << "] " << std::endl
		<< "[R :: " << *pipeline_[r_stage] << "] " << std::endl
		<< "[E :: " << *pipeline_[e_stage] << "] " << std::endl
		<< "[M :: " << *pipeline_[m_stage] << "] " << std::endl
		<< "[W :: " << *pipeline_[w_stage] << "] " << std::endl
		<< std::endl;

    pipeline_[w_stage] = pipeline_[m_stage];
    pipeline_[m_stage] = pipeline_[e_stage];
    pipeline_[e_stage] = pipeline_[r_stage];
    pipeline_[r_stage] = pipeline_[d_stage];
    pipeline_[d_stage] = pipeline_[i_stage];
    pipeline_[i_stage] = & mmu_.inst_load(pc_ / 4);

    ++counters_[ pipeline_[e_stage]->get_format() ];
    pipeline_[e_stage]->accept(*this);
    pc_ = pc_ + 4;
  }

  //
  inline std::ostream &
  operator<<(std::ostream &ostr, const Cpu &cpu)
  {
    cpu.write(ostr);
    return ostr;
  }

} // namespace vm

#endif // !VM_CPU_HXX