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//
// This file is part of Mipsy, a tiny MIPS simulator
// Copyright (C) 2003 Benoit Perrot <benoit@lrde.epita.fr>
//
// Mipsy is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; either version 2 of the License, or
// (at your option) any later version.
// 
// Mipsy is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
// 
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
//
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#ifndef VM_CPU_HH
# define VM_CPU_HH

// FIXME: lack of compatibility
# include <stdint.h>

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# include <stack>

# include "inst/visitor.hh"
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# include "inst/register.hh"
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# include "inst/program.hh"
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# include "vm/memory.hh"
# include "vm/table.hh"

namespace vm
{

  typedef int32_t	register_t;
  typedef uint32_t	uregister_t;
  
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  class Cpu:
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    protected inst::ConstVisitor
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  {
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  public:
    enum kind_t
      {
	zero = 0,
	at,
	v0, v1,
	a0, a1, a2, a3,
	t0, t1, t2, t3, t4, t5, t6, t7,
	s0, s1, s2, s3, s4, s5, s6, s7,
	t8, t9,
	k0, k1,
	gp,
	sp,
	fp,
	ra = 31
      };

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  public:
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    Cpu(Memory& mem, 
	std::istream& istr, 
	std::ostream& ostr, 
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	bool check_callee_save_p, 
	bool trace_p):
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      memory(mem),
      istr(istr), ostr(ostr),
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      check_callee_save_p(check_callee_save_p),
      trace_p(trace_p)
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    {
      reset();
    }

  public:
    void		reset()
    {
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      halt = false;

      // Initialize general purpose registers to 0.
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      for (unsigned i = 0; i < 32; ++i)
	GPR[i] = 0;
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      // Initialize stack pointers to bottom of stack.
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      GPR[sp] = Memory::stack_bottom;
      GPR[fp] = Memory::stack_bottom;
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      // Initialize special registers to 0.
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      lo = 0;
      hi = 0;
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    }

  public:
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    register_t		get_register(kind_t k) const
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    {
      return GPR[k];
    }
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    void		set_register(kind_t k, register_t r)
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    {
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      if (k != Cpu::zero)
	GPR[k] = r;
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    }
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    bool		has_unlimited(int i) const
    {
      return unlimited.has(i);
    }
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    register_t		get_unlimited(int i) const
    {
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      precondition(has_unlimited(i));
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      return unlimited.get(i);
    }
    void		set_unlimited(int i, register_t r)
    {
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      unlimited.put(i, r);
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    }

    register_t		get_register(const inst::Register& reg) const
    {
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      if (reg.get_kind() == inst::Register::unlimited)
	{
	  precondition(has_unlimited(reg.get_index ()));
	  return unlimited.get(reg.get_index ());
	}
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      precondition(reg.get_kind() == inst::Register::general &&
		   Cpu::zero <= reg.get_index() && reg.get_index() <= Cpu::ra);
      return get_register((kind_t) reg.get_index());
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    }
    void		set_register(const inst::Register& reg, register_t r)
    {
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      if (reg.get_kind() == inst::Register::unlimited)
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	{
	  unlimited.put(reg.get_index (), r);
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	  return;
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	}
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      precondition(reg.get_kind() == inst::Register::general &&
		   Cpu::zero <= reg.get_index() && reg.get_index() <= Cpu::ra);
      set_register((kind_t) reg.get_index(), r);
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    }

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    register_t		get_hi() const { return hi; }
    void		set_hi(register_t r) { hi = r; }

    register_t		get_lo() const { return lo; }
    void		set_lo(register_t r) { lo = r; }

    register_t		get_pc() const { return pc; }
    void		set_pc(register_t r) { pc = r; }

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  protected:
    virtual void	visit(const inst::Add& add);
    virtual void	visit(const inst::Addi& addi);
    virtual void	visit(const inst::Addu& addu);
    virtual void	visit(const inst::Addiu& addiu);
    virtual void	visit(const inst::Sub& sub);
    virtual void	visit(const inst::Subu& subu);

    virtual void	visit(const inst::Sll& sll);
    virtual void	visit(const inst::Sllv& slv);
    virtual void	visit(const inst::Sra& sra);
    virtual void	visit(const inst::Srav& srav);
    virtual void	visit(const inst::Srl& srl);
    virtual void	visit(const inst::Srlv& srlv);

    virtual void	visit(const inst::Mul& mul);
    virtual void	visit(const inst::Div& div);
    virtual void	visit(const inst::Divu& divu);

    virtual void	visit(const inst::Lb& lb);
    virtual void	visit(const inst::Lbu& Lbu);
    virtual void	visit(const inst::Lw& lw);
    virtual void	visit(const inst::Li& li);
    virtual void	visit(const inst::Sb& sb);
    virtual void	visit(const inst::Sw& sw);

    virtual void	visit(const inst::And& _and);
    virtual void	visit(const inst::Andi& andi);
    virtual void	visit(const inst::Or& _or);
    virtual void	visit(const inst::Ori& ori);
    virtual void	visit(const inst::Nor& nor);
    virtual void	visit(const inst::Xor& _xor);
    virtual void	visit(const inst::Xori& xori);

    virtual void	visit(const inst::Slt& slt);
    virtual void	visit(const inst::Slti& slti);
    virtual void	visit(const inst::Sltu&);
    virtual void	visit(const inst::Sltiu& sltiu);

    virtual void	visit(const inst::Jmp& jmp);
    virtual void	visit(const inst::Jr& jr);
    virtual void	visit(const inst::Jal& jal);
    virtual void	visit(const inst::Jalr& jalr);

    virtual void	visit(const inst::Beq& beq);
    virtual void	visit(const inst::Bne& bne);

    virtual void	visit(const inst::Bgez& bgez);
    virtual void	visit(const inst::Bgezal& bgezal);
    virtual void	visit(const inst::Bgtz& bgtz);

    virtual void	visit(const inst::Blez& blez);
    virtual void	visit(const inst::Bltz& bltz);
    virtual void	visit(const inst::Bltzal& bltzal);

    virtual void	visit(const inst::Mfhi& mfhi);
    virtual void	visit(const inst::Mflo& mflo);
    virtual void	visit(const inst::Mthi& mthi);
    virtual void	visit(const inst::Mtlo& mtlo);

    virtual void	visit(const inst::Syscall& sycall);

  protected:
    // FIXME: Should use an MMU
    Memory&			memory;

    register_t			GPR[32];
    register_t			hi, lo;
    register_t			pc;

    Table<int, register_t>	unlimited;

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  public:
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    bool		get_halt() const { return halt; }
  protected:
    bool		halt;

    std::istream&	istr;
    std::ostream&	ostr;


  protected:
    void		call()
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    {
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      if (check_callee_save_p)
	for (int i = Cpu::s0; i <= Cpu::s7; ++i)
	  set_unlimited(-i, get_register((Cpu::kind_t) i));
      call_stack.push(get_pc ());

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      unlimited.begin_scope();
    }
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    void		ret()
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    {
      unlimited.end_scope();

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      if (check_callee_save_p)
	for (int i = Cpu::s0; i <= Cpu::s7; ++i)
	  if (get_unlimited(-i) != get_register((Cpu::kind_t) i))
	    {
	      std::cerr
		<< "Warning: callee save register `$s" << i - Cpu::s0
		<< "' was not preserved across last call to 0x"
		<< std::hex << call_stack.top()	<< std::dec << std::endl;
	      set_register((Cpu::kind_t) i, get_unlimited(-i));
	      exit_set(exit_runtime);
	    }
      call_stack.pop();
    }
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  protected:
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    std::stack<register_t>	call_stack;
    bool		check_callee_save_p;
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  public:
    void		step()
    {
      const inst::Inst& ri = (*text_section)[pc / 4];
      pc = pc + 4;
      
      if (trace_p)
	std::cout << ri << std::endl;
      ri.accept(*this);
    }
    void		set_text_section(const inst::TextSection& s)
    {
      text_section = &s;
    }
  protected:
    const inst::TextSection*	text_section;
    bool		trace_p;
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  };

} // namespace vm

#endif // !VM_CPU_HH