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//
// This file is part of Mipsy, a tiny MIPS simulator
// Copyright (C) 2003 Benoit Perrot <benoit@lrde.epita.fr>
//
// Mipsy is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; either version 2 of the License, or
// (at your option) any later version.
// 
// Mipsy is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
// 
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
//
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#ifndef VM_CPU_HH
# define VM_CPU_HH

// FIXME: lack of compatibility
# include <stdint.h>

# include "inst/register.hh"
# include "vm/memory.hh"
# include "vm/table.hh"

namespace vm
{

  typedef int32_t	register_t;
  typedef uint32_t	uregister_t;
  
  class Cpu
  {
  public:
    Cpu()
    {
      reset();
    }

  public:
    void		reset()
    {
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      for (unsigned i = 0; i < 32; ++i)
	GPR[i] = 0;
      GPR[inst::Register::sp] = Memory::stack_bottom;
      GPR[inst::Register::fp] = Memory::stack_bottom;
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      lo = 0;
      hi = 0;
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    }

  public:
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    register_t		get_at() const { return GPR[inst::Register::at]; }
    void		set_at(register_t r) { GPR[inst::Register::at] = r; }
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    register_t		get_v0() const { return GPR[inst::Register::v0]; }
    void		set_v0(register_t r) { GPR[inst::Register::v0] = r; }
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    register_t		get_a0() const { return GPR[inst::Register::a0]; }
    register_t		get_a1() const { return GPR[inst::Register::a1]; }
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    register_t		get_sp() const { return GPR[inst::Register::sp]; }
    void		set_sp(register_t r) { GPR[inst::Register::sp] = r; }
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    register_t		get_fp() const { return GPR[inst::Register::fp]; }
    void		set_fp(register_t r) { GPR[inst::Register::fp] = r; }
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    register_t		get_ra() const { return GPR[inst::Register::ra]; }
    void		set_ra(register_t r) { GPR[inst::Register::ra] = r; }

    register_t		get_register(const inst::Register::kind_t k) const
    {
      assertion(k != inst::Register::unlimited);
      return GPR[k];
    }
    void		set_register(const inst::Register::kind_t k,
				      register_t r)
    {
      assertion((k != inst::Register::unlimited) &&
		(k != inst::Register::zero));
      GPR[k] = r;
    }
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    register_t		get_unlimited(int i) const
    {
      // FIXME: precondition: check existence!
      return unlimited.get(i);
    }
    void		set_unlimited(int i, register_t r)
    {
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      unlimited.put(i, r);
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    }

    register_t		get_register(const inst::Register& reg) const
    {
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      if (reg.get_kind() != inst::Register::unlimited)
	return GPR[reg.get_kind()];
      // FIXME: check existence!
      return unlimited.get(reg.get_index ());
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    }
    void		set_register(const inst::Register& reg, register_t r)
    {
      switch (reg.get_kind())
	{
	case inst::Register::zero:	  break;
	case inst::Register::unlimited:
	  unlimited.put(reg.get_index (), r);
	  break;
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	default:
	  GPR[reg.get_kind()] = r;
	  break;
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	}
    }

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  public:
    register_t		get_hi() const { return hi; }
    void		set_hi(register_t r) { hi = r; }

    register_t		get_lo() const { return lo; }
    void		set_lo(register_t r) { lo = r; }

    register_t		get_pc() const { return pc; }
    void		set_pc(register_t r) { pc = r; }


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  public:
    void			begin_scope()
    {
      unlimited.begin_scope();
    }
    void			end_scope()
    {
      unlimited.end_scope();
    }

  protected:
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    register_t			GPR[32];

//     register_t			zero;
//     register_t			at;
//     register_t			v[2];
//     register_t			a[4];
//     register_t			t[10];
//     register_t			s[9];
//     register_t			sp, fp;
//     register_t			ra;
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    Table<int, register_t>	unlimited;
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    register_t			hi, lo;
    register_t			pc;
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  };

} // namespace vm

#endif // !VM_CPU_HH