Commit 53104451 authored by Benoit Perrot's avatar Benoit Perrot
Browse files

Index: ChangeLog

--- ChangeLog Sat, 10 Jan 2004 23:58:50 +0100 noe (mipsy/2_ChangeLog 1.57 604)
+++ ChangeLog Mon, 12 Jan 2004 15:27:22 +0100 noe (mipsy/2_ChangeLog 1.57 604)
@@ -1,3 +1,11 @@
+2004-01-12  Benoît Perrot  <benoit@lrde.epita.fr>
+
+	* src/vm/mmu.hh:
+	* src/vm/Makefile.am: Distribute mmu.hh.
+	* src/vm/cpu.hh, src/vm/cpu.cc,
+	* src/vm/virtual_machine.hh:
+	Use a Memory Management Unit to access memory.
+
 2004-01-10  Benoît Perrot  <benoit@lrde.epita.fr>
 
 	* dev/inst-nodes-gen.py: Generate interface of classes in
parent 7de525af
2004-01-12 Benot Perrot <benoit@lrde.epita.fr>
* src/vm/mmu.hh:
* src/vm/Makefile.am: Distribute mmu.hh.
* src/vm/cpu.hh, src/vm/cpu.cc,
* src/vm/virtual_machine.hh:
Use a Memory Management Unit to access memory.
2004-01-10 Benot Perrot <benoit@lrde.epita.fr> 2004-01-10 Benot Perrot <benoit@lrde.epita.fr>
* dev/inst-nodes-gen.py: Generate interface of classes in * dev/inst-nodes-gen.py: Generate interface of classes in
......
...@@ -2,32 +2,30 @@ ...@@ -2,32 +2,30 @@
(Created-By-Prcs-Version 1 3 2) (Created-By-Prcs-Version 1 3 2)
(Project-Description "") (Project-Description "")
(Project-Version mipsy 0 63) (Project-Version mipsy 0 64)
(Parent-Version mipsy 0 62) (Parent-Version mipsy 0 63)
(Version-Log (Version-Log
"Index: ChangeLog "Index: ChangeLog
--- ChangeLog Sat, 10 Jan 2004 22:32:29 +0100 noe (mipsy/2_ChangeLog 1.56 604) --- ChangeLog Sat, 10 Jan 2004 23:58:50 +0100 noe (mipsy/2_ChangeLog 1.57 604)
+++ ChangeLog Sat, 10 Jan 2004 23:23:14 +0100 noe (mipsy/2_ChangeLog 1.56 604) +++ ChangeLog Mon, 12 Jan 2004 15:27:22 +0100 noe (mipsy/2_ChangeLog 1.57 604)
@@ -1,5 +1,13 @@ @@ -1,3 +1,11 @@
2004-01-10 Benot Perrot <benoit@lrde.epita.fr> +2004-01-12 Benot Perrot <benoit@lrde.epita.fr>
+ * dev/inst-nodes-gen.py: Generate interface of classes in
+ .hh files, inline methods in .hxx files, implementation in .cc.
+ * dev/inst-makefile-gen.py:
+ Distribute .hh, .hxx, .cc files of each class.
+ Use a stamp file to avoid useness launching of generators.
+ +
+2004-01-10 Benot Perrot <benoit@lrde.epita.fr> + * src/vm/mmu.hh:
+ * src/vm/Makefile.am: Distribute mmu.hh.
+ * src/vm/cpu.hh, src/vm/cpu.cc,
+ * src/vm/virtual_machine.hh:
+ Use a Memory Management Unit to access memory.
+ +
* dev/mipsy.xml, dev/parse-asm-parse-gen.py: 2004-01-10 Benot Perrot <benoit@lrde.epita.fr>
Use human readable identifiers to locate tokens.
* dev/inst-nodes-gen.py: Generate interface of classes in
") ")
(New-Version-Log (New-Version-Log
"") "")
(Checkin-Time "Sat, 10 Jan 2004 23:58:50 +0100") (Checkin-Time "Mon, 12 Jan 2004 15:28:03 +0100")
(Checkin-Login noe) (Checkin-Login noe)
(Files (Files
...@@ -35,7 +33,7 @@ ...@@ -35,7 +33,7 @@
;; ./ ;; ./
(AUTHORS (mipsy/0_AUTHORS 1.1 604)) (AUTHORS (mipsy/0_AUTHORS 1.1 604))
(COPYING (mipsy/1_COPYING 1.1 604)) (COPYING (mipsy/1_COPYING 1.1 604))
(ChangeLog (mipsy/2_ChangeLog 1.57 604)) (ChangeLog (mipsy/2_ChangeLog 1.58 604))
(Makefile.am (mipsy/3_Makefile.a 1.7 604)) (Makefile.am (mipsy/3_Makefile.a 1.7 604))
(NEWS (mipsy/b/25_NEWS 1.5 604)) (NEWS (mipsy/b/25_NEWS 1.5 604))
(README (mipsy/4_README 1.2 604)) (README (mipsy/4_README 1.2 604))
...@@ -111,13 +109,14 @@ ...@@ -111,13 +109,14 @@
(src/task/task_register.hh (mipsy/51_task_regis 1.3 604)) (src/task/task_register.hh (mipsy/51_task_regis 1.3 604))
;; ./src/vm/ ;; ./src/vm/
(src/vm/Makefile.am (mipsy/b/0_Makefile.a 1.3 604)) (src/vm/Makefile.am (mipsy/b/0_Makefile.a 1.4 604))
(src/vm/cpu.hh (mipsy/b/1_cpu.hh 1.9 604)) (src/vm/cpu.hh (mipsy/b/1_cpu.hh 1.10 604))
(src/vm/cpu.cc (mipsy/b/5_virtual_ma 1.17 604)) (src/vm/cpu.cc (mipsy/b/5_virtual_ma 1.18 604))
(src/vm/memory.hh (mipsy/b/2_memory.hh 1.7 604)) (src/vm/memory.hh (mipsy/b/2_memory.hh 1.7 604))
(src/vm/mmu.hh (mipsy/c/15_mmu.hh 1.1 604))
(src/vm/segment.hh (mipsy/b/3_segment.hh 1.2 604)) (src/vm/segment.hh (mipsy/b/3_segment.hh 1.2 604))
(src/vm/table.hh (mipsy/b/4_table.hh 1.2 604)) (src/vm/table.hh (mipsy/b/4_table.hh 1.2 604))
(src/vm/virtual_machine.hh (mipsy/b/6_virtual_ma 1.12 604)) (src/vm/virtual_machine.hh (mipsy/b/6_virtual_ma 1.13 604))
(src/vm/vm-tasks.cc (mipsy/b/7_vm-tasks.c 1.5 604)) (src/vm/vm-tasks.cc (mipsy/b/7_vm-tasks.c 1.5 604))
(src/vm/vm-tasks.hh (mipsy/b/8_vm-tasks.h 1.3 604)) (src/vm/vm-tasks.hh (mipsy/b/8_vm-tasks.h 1.3 604))
......
...@@ -4,6 +4,7 @@ noinst_LIBRARIES = libvm.a ...@@ -4,6 +4,7 @@ noinst_LIBRARIES = libvm.a
libvm_a_SOURCES = \ libvm_a_SOURCES = \
table.hh \ table.hh \
mmu.hh \
cpu.hh cpu.cc \ cpu.hh cpu.cc \
segment.hh \ segment.hh \
memory.hh \ memory.hh \
......
...@@ -67,14 +67,14 @@ namespace vm ...@@ -67,14 +67,14 @@ namespace vm
Cpu::visit(const inst::Addu& addu) Cpu::visit(const inst::Addu& addu)
{ {
set_register(addu.get_dest (), set_register(addu.get_dest (),
get_register(addu.get_src1 ()) + get_register(addu.get_src1 ()) +
get_register(addu.get_src2 ())); get_register(addu.get_src2 ()));
} }
void void
Cpu::visit(const inst::Addiu& addiu) Cpu::visit(const inst::Addiu& addiu)
{ {
set_register(addiu.get_dest (), set_register(addiu.get_dest (),
get_register(addiu.get_src ()) + addiu.get_imm ()); get_register(addiu.get_src ()) + addiu.get_imm ());
} }
void void
...@@ -96,8 +96,8 @@ namespace vm ...@@ -96,8 +96,8 @@ namespace vm
Cpu::visit(const inst::Subu& subu) Cpu::visit(const inst::Subu& subu)
{ {
set_register(subu.get_dest (), set_register(subu.get_dest (),
get_register(subu.get_src1 ()) - get_register(subu.get_src1 ()) -
get_register(subu.get_src2 ())); get_register(subu.get_src2 ()));
} }
void void
...@@ -290,14 +290,14 @@ namespace vm ...@@ -290,14 +290,14 @@ namespace vm
Cpu::visit(const inst::Sb& sb) Cpu::visit(const inst::Sb& sb)
{ {
register_t addr = get_register(sb.get_base ()) + sb.get_offset (); register_t addr = get_register(sb.get_base ()) + sb.get_offset ();
memory.store_byte(addr, get_register(sb.get_src ())); mmu.data_store_byte(addr, get_register(sb.get_src ()));
} }
void void
Cpu::visit(const inst::Sw& sw) Cpu::visit(const inst::Sw& sw)
{ {
register_t addr = get_register(sw.get_base ()) + sw.get_offset (); register_t addr = get_register(sw.get_base ()) + sw.get_offset ();
memory.store_word(addr, get_register(sw.get_src ())); mmu.data_store_word(addr, get_register(sw.get_src ()));
} }
// Load // Load
...@@ -305,14 +305,14 @@ namespace vm ...@@ -305,14 +305,14 @@ namespace vm
Cpu::visit(const inst::Lb& lb) Cpu::visit(const inst::Lb& lb)
{ {
register_t addr = get_register(lb.get_base ()) + lb.get_offset (); register_t addr = get_register(lb.get_base ()) + lb.get_offset ();
set_register(lb.get_dest (), memory.load_byte(addr)); set_register(lb.get_dest (), mmu.data_load_byte(addr));
} }
void void
Cpu::visit(const inst::Lbu& lbu) Cpu::visit(const inst::Lbu& lbu)
{ {
register_t addr = get_register(lbu.get_base ()) + lbu.get_offset (); register_t addr = get_register(lbu.get_base ()) + lbu.get_offset ();
unsigned b = memory.load_byte(addr); unsigned b = mmu.data_load_byte(addr);
set_register(lbu.get_dest (), b % 256); set_register(lbu.get_dest (), b % 256);
} }
...@@ -320,7 +320,7 @@ namespace vm ...@@ -320,7 +320,7 @@ namespace vm
Cpu::visit(const inst::Lw& lw) Cpu::visit(const inst::Lw& lw)
{ {
register_t addr = get_register(lw.get_base ()) + lw.get_offset (); register_t addr = get_register(lw.get_base ()) + lw.get_offset ();
set_register(lw.get_dest (), memory.load_word(addr)); set_register(lw.get_dest (), mmu.data_load_word(addr));
} }
// -------------------------------------------------------------------------- // --------------------------------------------------------------------------
...@@ -514,7 +514,7 @@ namespace vm ...@@ -514,7 +514,7 @@ namespace vm
case 4: case 4:
for (int i = get_register(Cpu::a0); true; ++i) for (int i = get_register(Cpu::a0); true; ++i)
{ {
char b = memory.load_byte(i); char b = mmu.data_load_byte(i);
if (b == 0) if (b == 0)
break; break;
ostr << b; ostr << b;
...@@ -532,15 +532,15 @@ namespace vm ...@@ -532,15 +532,15 @@ namespace vm
c = istr.get(); c = istr.get();
if (istr.eof()) if (istr.eof())
break; break;
memory.store_byte(get_register(Cpu::a0) + i, c); mmu.data_store_byte(get_register(Cpu::a0) + i, c);
} }
memory.store_byte(get_register(Cpu::a0) + i, 0); mmu.data_store_byte(get_register(Cpu::a0) + i, 0);
} }
break; break;
// sbrk (size: $a0) // sbrk (size: $a0)
case 9: case 9:
set_register(Cpu::v0, memory.sbrk(get_register(Cpu::a0))); set_register(Cpu::v0, mmu.data_sbrk(get_register(Cpu::a0)));
break; break;
// exit (status : $a0) // exit (status : $a0)
......
...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
# include "inst/register.hh" # include "inst/register.hh"
# include "inst/program.hh" # include "inst/program.hh"
# include "vm/memory.hh" # include "vm/mmu.hh"
# include "vm/table.hh" # include "vm/table.hh"
namespace vm namespace vm
...@@ -58,12 +58,12 @@ namespace vm ...@@ -58,12 +58,12 @@ namespace vm
}; };
public: public:
Cpu(Memory& mem, Cpu(Mmu& mmu,
std::istream& istr, std::istream& istr,
std::ostream& ostr, std::ostream& ostr,
bool check_callee_save_p, bool check_callee_save_p,
bool trace_p): bool trace_p):
memory(mem), mmu(mmu),
istr(istr), ostr(ostr), istr(istr), ostr(ostr),
check_callee_save_p(check_callee_save_p), check_callee_save_p(check_callee_save_p),
trace_p(trace_p) trace_p(trace_p)
...@@ -207,8 +207,7 @@ namespace vm ...@@ -207,8 +207,7 @@ namespace vm
virtual void visit(const inst::Syscall& sycall); virtual void visit(const inst::Syscall& sycall);
protected: protected:
// FIXME: Should use an MMU Mmu& mmu;
Memory& memory;
register_t GPR[32]; register_t GPR[32];
register_t hi, lo; register_t hi, lo;
...@@ -260,19 +259,14 @@ namespace vm ...@@ -260,19 +259,14 @@ namespace vm
public: public:
void step() void step()
{ {
const inst::Inst& ri = (*text_section)[pc / 4]; const inst::Inst& ri = mmu.inst()[pc / 4];
pc = pc + 4; pc = pc + 4;
if (trace_p) if (trace_p)
std::cout << ri << std::endl; std::cout << ri << std::endl;
ri.accept(*this); ri.accept(*this);
} }
void set_text_section(const inst::TextSection& s)
{
text_section = &s;
}
protected: protected:
const inst::TextSection* text_section;
bool trace_p; bool trace_p;
}; };
......
//
// This file is part of Mipsy, a tiny MIPS simulator
// Copyright (C) 2003 Benoit Perrot <benoit@lrde.epita.fr>
//
// Mipsy is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; either version 2 of the License, or
// (at your option) any later version.
//
// Mipsy is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
//
#ifndef VM_MMU_HH
# define VM_MMU_HH
# include "inst/text_section.hh"
# include "vm/memory.hh"
namespace vm
{
class Mmu
{
public:
Mmu(Memory& memory):
memory_(memory),
text_section_(0)
{}
public:
void data_store(const inst::DataSection& data_section)
{
memory_.store(data_section);
}
void data_store_byte(int offset, int b)
{
memory_.store_byte(offset, b);
}
void data_store_word(int offset, int w)
{
memory_.store_word(offset, w);
}
int data_load_byte(int offset) const
{
return memory_.load_byte(offset);
}
int data_load_word(int offset) const
{
return memory_.load_word(offset);
}
int data_sbrk(int size)
{
return memory_.sbrk(size);
}
public:
const inst::TextSection& inst() const
{
return *text_section_;
}
void inst_store(const inst::TextSection& text_section)
{
text_section_ = &text_section;
}
protected:
Memory& memory_;
const inst::TextSection* text_section_;
};
} // namespace vm
#endif // !VM_MMU_HH
...@@ -26,8 +26,9 @@ ...@@ -26,8 +26,9 @@
# include "inst/program.hh" # include "inst/program.hh"
# include "vm/cpu.hh"
# include "vm/memory.hh" # include "vm/memory.hh"
# include "vm/mmu.hh"
# include "vm/cpu.hh"
namespace vm namespace vm
{ {
...@@ -39,8 +40,8 @@ namespace vm ...@@ -39,8 +40,8 @@ namespace vm
bool trace_exec_p, bool trace_exec_p,
std::istream& istr = std::cin, std::istream& istr = std::cin,
std::ostream& ostr = std::cout): std::ostream& ostr = std::cout):
cpu(memory, istr, ostr, check_callee_save_p, trace_exec_p), mmu(memory),
program(0) cpu(mmu, istr, ostr, check_callee_save_p, trace_exec_p)
{ {
} }
...@@ -54,26 +55,24 @@ namespace vm ...@@ -54,26 +55,24 @@ namespace vm
exit_set(exit_runtime); exit_set(exit_runtime);
return; return;
} }
this->program = &program; mmu.data_store(program.data_section());
memory.store(program.data_section()); mmu.inst_store(program.text_section());
cpu.set_text_section(program.text_section ());
cpu.set_pc(program.text_section ().get_offset(inst::Label("main"))); cpu.set_pc(program.text_section ().get_offset(inst::Label("main")));
} }
public: public:
void execute() void execute()
{ {
precondition(program); // FIXME: precondition on loaded program
while (!cpu.get_halt()) while (!cpu.get_halt())
cpu.step(); cpu.step();
} }
protected: protected:
Cpu cpu;
const inst::Program* program;
Memory memory; Memory memory;
Mmu mmu;
Cpu cpu;
}; };
} // namespace vm } // namespace vm
......
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