Commit c50f9289 authored by Benoit Perrot's avatar Benoit Perrot
Browse files

2005-03-06 Benoît Perrot <benoit@lrde.epita.fr>

	Specify instruction format type to distinguish register, immediate
	and jump instructions.

	* src/inst/inst.hh: Add a format attribute.
	* dev/nolimips.xml, dev/nolimips.py, dev/inst-nodes-gen.py: 
	Fill it.
	
parent 5bc23e86
2005-03-06 Benoît Perrot <benoit@lrde.epita.fr>
Specify instruction format type to distinguish register, immediate
and jump instructions.
* src/inst/inst.hh: Add a format attribute.
* dev/nolimips.xml, dev/nolimips.py, dev/inst-nodes-gen.py:
Fill it.
2005-03-06 Benoît Perrot <benoit@lrde.epita.fr>
Provide `--profile' option.
......
......@@ -31,6 +31,12 @@ if __name__ != "__main__" or len(sys.argv) != 2:
srcdir = sys.argv[1]
## Generate the class corresponding to an instruction
format_type_to_enum = {
"register": "r_type",
"immediate": "i_type",
"jump": "j_type",
}
def class_generate(inst):
## Shortands
......@@ -109,11 +115,12 @@ def class_generate(inst):
print " /** \\} */"
sys.stdout = inline
print " inline"
if args == "":
print " " + class_id + "::" + class_id + "()"
print " " + class_id + "::" + class_id + "(" + args + ")" + ":"
if init == "":
print " Inst(" + format_type_to_enum[format.type] + ")"
else:
print " " + class_id + "::" + class_id + "(" + args + ")" + ":"
print " " + init
print " Inst(" + format_type_to_enum[format.type] + "),"
print " " + init
print " {}\n"
sys.stdout = impl
print " " + class_id + "::~" + class_id + "()"
......
......@@ -120,7 +120,8 @@ class AttributeBuilder:
return Attribute(self.type, self.restriction, self.name, self.value)
class Format:
def __init__(self, attributes):
def __init__(self, type, attributes):
self.type = type
self.attributes = attributes
def __str__(self):
res = " <format>"
......@@ -129,11 +130,12 @@ class Format:
return res + "\n </format>"
class FormatBuilder:
def reset(self):
self.type = ""
self.attributes = []
def __init__(self):
self.reset()
def get(self):
return Format(self.attributes)
return Format(self.type, self.attributes)
## -------------------------------------
......@@ -212,12 +214,13 @@ class InstructionBuilder:
self.level = ""
self.kind = ""
self.desc = ""
self.format = Format("")
self.format = Format("", [])
self.syntaxes = []
def __init__(self):
self.reset()
def get(self):
assert(self.opcode != "" and self.level != "" and self.kind != "")
assert(self.opcode != "" and self.level != "" and self.kind != "" and
(self.level != "native" or self.format.type != ""))
return Instruction(self.opcode, self.level, self.kind, self.desc,
self.format, self.syntaxes)
......@@ -245,6 +248,8 @@ class InstructionSetHandler(ContentHandler):
self.content = ""
elif name == "format":
self.format_b = FormatBuilder()
if attrs.has_key("type"):
self.format_b.type = attrs["type"]
elif name == "attribute":
self.attr_b.reset()
self.attr_b.type = attrs["type"]
......
......@@ -21,7 +21,7 @@
<instruction opcode="add" level="native" kind="arithmetic">
<description>Add src1 and src2 and store the result in dest
(32-bit integers). If an overflow occurs, then trap.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -40,7 +40,7 @@
<instruction opcode="addu" level="native" kind="arithmetic">
<description>Add src1 and src2 and store the result in dest
(32-bit integers).</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -60,7 +60,7 @@
<instruction opcode="addi" level="native" kind="arithmetic">
<description>Add a constant imm and src and store the result in dest
(32-bit integers). If overflow occurs, then trap.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -74,7 +74,7 @@
<instruction opcode="addiu" level="native" kind="arithmetic">
<description>Add a constant imm and src and store the result in dest
(32-bit integer).</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -89,7 +89,7 @@
<instruction opcode="sub" level="native" kind="arithmetic">
<description>Subtract src2 from src1 and store the result in dest
(32-bit integers). If an overflow occurs (FIXME), then trap.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -108,7 +108,7 @@
<instruction opcode="subu" level="native" kind="arithmetic">
<description>Subtract src2 from src1 and store the result in dest
(32-bit integers).</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -156,7 +156,7 @@ write it to dest.</description>
<instruction opcode="mul" level="native" kind="arithmetic">
<description>Multiply two words src1 and src2 and write the result
to dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -176,7 +176,7 @@ to dest.</description>
<instruction opcode="div" level="native" kind="arithmetic">
<description>Divide src1 by src2 (32-bit signed integers), write
the quotient in LO and the remainder in HI (32-bit integer).</description>
<format>
<format type="register">
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
</format>
......@@ -198,7 +198,7 @@ the quotient in LO and the remainder in HI (32-bit integer).</description>
<instruction opcode="divu" level="native" kind="arithmetic">
<description>Divide src1 by src2 (32-bit unsigned integers), write
the quotient in LO and the remainder in HI (32-bit integer).</description>
<format>
<format type="register">
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
</format>
......@@ -242,7 +242,7 @@ the quotient in LO and the remainder in HI (32-bit integer).</description>
<instruction opcode="sll" level="native" kind="bitwise">
<description>Left-shift (logical) the word src by the fixed number imm of
bits and store the result in dest.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -261,7 +261,7 @@ bits and store the result in dest.</description>
<instruction opcode="sllv" level="native" kind="bitwise">
<description>Left-shift (logical) the word src1 by the variable number
src2 of bits and store the result in dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -276,7 +276,7 @@ src2 of bits and store the result in dest.</description>
<instruction opcode="sra" level="native" kind="bitwise">
<description>Right-shift (arithmetic) the word src by the fixed number
imm of bits and store the result in dest.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -295,7 +295,7 @@ imm of bits and store the result in dest.</description>
<instruction opcode="srav" level="native" kind="bitwise">
<description>Right-shift (arithmetic) the word src1 by the variable number
src2 of bits and store the result in dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -310,7 +310,7 @@ src2 of bits and store the result in dest.</description>
<instruction opcode="srl" level="native" kind="bitwise">
<description>Right-shift (logical) the word src1 by the variable number
src2 of bits and store the result in dest.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -329,7 +329,7 @@ src2 of bits and store the result in dest.</description>
<instruction opcode="srlv" level="native" kind="bitwise">
<description>Right-shift (logical) the word src1 by the variable number
src2 of bits and store the result in dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -375,7 +375,7 @@ and store the result in dest.</description>
<instruction opcode="and" level="native" kind="bitwise">
<description>Compute the bitwise logical AND between src1 and src2
and store the result to dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -394,7 +394,7 @@ and store the result to dest.</description>
<instruction opcode="andi" level="native" kind="bitwise">
<description>Compute the bitwise logical AND between src and a constant imm
and store the result to dest.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -410,7 +410,7 @@ and store the result to dest.</description>
<instruction opcode="or" level="native" kind="bitwise">
<description>Compute the bitwise logical OR between src1 and src2
and store the result to dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -427,9 +427,9 @@ and store the result to dest.</description>
</syntax>
</instruction>
<instruction opcode="ori" level="native" kind="bitwise">
<description>Compute the bitwise logical AND between src and a constant imm
<description>Compute the bitwise logical OR between src and a constant imm
and store the result to dest.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -445,7 +445,7 @@ and store the result to dest.</description>
<instruction opcode="xor" level="native" kind="bitwise">
<description>Compute the bitwise logical XOR between src1 and src2
and store the result to dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -464,7 +464,7 @@ and store the result to dest.</description>
<instruction opcode="xori" level="native" kind="bitwise">
<description>Compute the bitwise logical XOR between src and a constant imm
and store the result to dest.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -480,7 +480,7 @@ and store the result to dest.</description>
<instruction opcode="nor" level="native" kind="bitwise">
<description>Compute the bitwise logical NOR between src1 and src2
and store the result to dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -629,7 +629,7 @@ else clear it.</description>
<instruction opcode="slt" level="native" kind="comparison">
<description>Set dest to 1 if src1 is lower than src2
(signed comparison), else clear it.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -648,7 +648,7 @@ else clear it.</description>
<instruction opcode="sltu" level="native" kind="comparison">
<description>Set dest to 1 if src1 is lower than src2
(unsigned comparison), else clear it.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src1" />
<attribute type="Register" name="src2" />
......@@ -668,7 +668,7 @@ else clear it.</description>
<instruction opcode="slti" level="native" kind="comparison">
<description>Set dest to 1 if src1 is lower than a constant imm
(signed comparison), else clear it.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -682,7 +682,7 @@ else clear it.</description>
<instruction opcode="sltiu" level="native" kind="comparison">
<description>Set dest to 1 if src1 is lower than a constant imm
(unsigned comparison), else clear it.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Register" name="src" />
<attribute type="Exp" name="imm" />
......@@ -698,7 +698,7 @@ else clear it.</description>
<!-- Branch instructions -->
<instruction opcode="beq" level="native" kind="branch">
<description>Branch to label if src1 equals src2.</description>
<format>
<format type="jump">
<attribute type="Register" name="src1"/>
<attribute type="Register" name="src2"/>
<attribute type="Exp" name="label"/>
......@@ -725,7 +725,7 @@ else clear it.</description>
<instruction opcode="bne" level="native" kind="branch">
<description>Branch to label if src1 does not equal src2.</description>
<format>
<format type="jump">
<attribute type="Register" name="src1"/>
<attribute type="Register" name="src2"/>
<attribute type="Exp" name="label"/>
......@@ -782,7 +782,7 @@ else clear it.</description>
<instruction opcode="bgez" level="native" kind="branch">
<description>Branch to label if src is greater or equal to zero
(signed comparison).</description>
<format>
<format type="jump">
<attribute type="Register" name="src"/>
<attribute type="Exp" name="label"/>
</format>
......@@ -794,7 +794,7 @@ else clear it.</description>
<instruction opcode="bgezal" level="native" kind="branch">
<description>Call label if src is greater or equal to zero
(signed comparison)</description>
<format>
<format type="jump">
<attribute type="Register" name="src"/>
<attribute type="Exp" name="label"/>
</format>
......@@ -835,7 +835,7 @@ else clear it.</description>
<instruction opcode="bgtz" level="native" kind="branch">
<description>Branch to label if src is greater than zero
(signed comparison).</description>
<format>
<format type="jump">
<attribute type="Register" name="src"/>
<attribute type="Exp" name="label"/>
</format>
......@@ -876,7 +876,7 @@ else clear it.</description>
<instruction opcode="blez" level="native" kind="branch">
<description>Branch to label if src is lower or equal to zero
(signed comparison).</description>
<format>
<format type="jump">
<attribute type="Register" name="src"/>
<attribute type="Exp" name="label"/>
</format>
......@@ -917,7 +917,7 @@ else clear it.</description>
<instruction opcode="bltz" level="native" kind="branch">
<description>Branch to label if src1 is lower than zero
(signed comparison).</description>
<format>
<format type="jump">
<attribute type="Register" name="src"/>
<attribute type="Exp" name="label"/>
</format>
......@@ -929,7 +929,7 @@ else clear it.</description>
<instruction opcode="bltzal" level="native" kind="branch">
<description>Call label if src1 is lower than zero
(signed comparison).</description>
<format>
<format type="jump">
<attribute type="Register" name="src"/>
<attribute type="Exp" name="label"/>
</format>
......@@ -942,7 +942,7 @@ else clear it.</description>
<instruction opcode="j" level="native" kind="branch">
<description>Jump to label unconditionaly.</description>
<format>
<format type="jump">
<attribute type="Exp" name="label" />
</format>
<syntax>
......@@ -951,7 +951,7 @@ else clear it.</description>
</instruction>
<instruction opcode="jal" level="native" kind="branch">
<description>Call label unconditionaly.</description>
<format>
<format type="jump">
<attribute type="Exp" name="label" />
</format>
<syntax>
......@@ -963,7 +963,7 @@ else clear it.</description>
<instruction opcode="jr" level="native" kind="branch">
<description>Jump to address contained in dest
unconditionaly.</description>
<format>
<format type="jump">
<attribute type="Register" name="dest" />
</format>
<syntax>
......@@ -972,7 +972,7 @@ unconditionaly.</description>
</instruction>
<instruction opcode="jalr" level="native" kind="branch">
<description>Call address contained in dest unconditionaly.</description>
<format>
<format type="jump">
<attribute type="Register" name="dest" />
</format>
<syntax>
......@@ -985,7 +985,7 @@ unconditionaly.</description>
<instruction opcode="lb" level="native" kind="load">
<description>Load the 8-bit quantity at address (offset + base) into
dest as a signed value.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Exp" name="offset" />
<attribute type="Register" name="base" />
......@@ -999,7 +999,7 @@ dest as a signed value.</description>
<instruction opcode="lbu" level="native" kind="load">
<description>Load the 8-bit quantity at address (offset + base) into
dest as an unsigned value.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Exp" name="offset" />
<attribute type="Register" name="base" />
......@@ -1014,7 +1014,7 @@ dest as an unsigned value.</description>
<instruction opcode="lw" level="native" kind="load">
<description>Load the 32-bit quantity at address (offset + base) into
dest as a signed value.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest" />
<attribute type="Exp" name="offset" />
<attribute type="Register" name="base" />
......@@ -1029,7 +1029,7 @@ dest as a signed value.</description>
<instruction opcode="lui" level="native" kind="load">
<description>Move the constant imm into the upper half word of
dest.</description>
<format>
<format type="immediate">
<attribute type="Register" name="dest"/>
<attribute type="Exp" name="imm"/>
</format>
......@@ -1066,7 +1066,7 @@ dest.</description>
<instruction opcode="sb" level="native" kind="store">
<description>Store the low byte from src at address
(offset + base).</description>
<format>
<format type="immediate">
<attribute type="Register" name="src" />
<attribute type="Exp" name="offset" />
<attribute type="Register" name="base" />
......@@ -1081,7 +1081,7 @@ dest.</description>
<instruction opcode="sw" level="native" kind="store">
<description>Store the low word from src at address
(offset + base).</description>
<format>
<format type="immediate">
<attribute type="Register" name="src" />
<attribute type="Exp" name="offset" />
<attribute type="Register" name="base" />
......@@ -1106,7 +1106,7 @@ dest.</description>
<instruction opcode="mfhi" level="native" kind="movement">
<description>Move the contents of HI to dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
</format>
<syntax>
......@@ -1115,7 +1115,7 @@ dest.</description>
</instruction>
<instruction opcode="mflo" level="native" kind="movement">
<description>Move the contents of LO to dest.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
</format>
<syntax>
......@@ -1125,7 +1125,7 @@ dest.</description>
<instruction opcode="mthi" level="native" kind="movement">
<description>Move the contents of dest to HI.</description>
<format>
<format type="register">
<attribute type="Register" name="src" />
</format>
<syntax>
......@@ -1134,7 +1134,7 @@ dest.</description>
</instruction>
<instruction opcode="mtlo" level="native" kind="movement">
<description>Move the contents of dest to LO.</description>
<format>
<format type="register">
<attribute type="Register" name="src" />
</format>
<syntax>
......@@ -1145,7 +1145,7 @@ dest.</description>
<instruction opcode="mfc0" level="native" kind="movement">
<description>Move the contents of control coprocessor src register
to CPU dest register.</description>
<format>
<format type="register">
<attribute type="Register" name="dest" />
<attribute type="Register" restriction="generic" name="src" />
</format>
......@@ -1157,7 +1157,7 @@ to CPU dest register.</description>
<instruction opcode="mtc0" level="native" kind="movement">
<description>Move the contents of CPU src register to control coprocessor
dest register.</description>
<format>
<format type="register">
<attribute type="Register" restriction="generic" name="dest" />
<attribute type="Register" name="src" />
</format>
......@@ -1171,6 +1171,7 @@ dest register.</description>
<!-- Exception and trap instructions -->
<instruction opcode="syscall" level="native" kind="syscall">
<description>Raise a system call exception.</description>
<format type="immediate" />
<syntax />
</instruction>
......
//
// This file is part of Nolimips, a MIPS simulator with unlimited registers
// Copyright (C) 2003, 2004 Benoit Perrot <benoit@lrde.epita.fr>
// Copyright (C) 2003, 2004, 2005 Benoit Perrot <benoit@lrde.epita.fr>
//
// Nolimips is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
......@@ -29,6 +29,17 @@ namespace inst
class Inst
{
public:
enum format_type
{
i_type = 0,
r_type = 1,
j_type = 2
};
public:
Inst(format_type format):
format_(format)
{}
virtual ~Inst()
{
}
......@@ -39,6 +50,15 @@ namespace inst
public:
virtual void print(std::ostream&) const = 0;
public:
format_type get_format() const
{
return format_;
}
private:
const format_type format_;
};
inline std::ostream&
......
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